The present invention relates to an integratable class AB output stage for low-frequency amplifiers.
In class AB audio amplifiers, the current circulating in the final power transistors in quiescent state is always approximately three orders of magnitude lower than the maximum deliverable current. This current must be sufficiently stable as the operating conditions vary, so as to not reduce to excessively low values, for which an increase of the cross-over distortion (distortion present at the passage through zero) occurs or so as to not increase to values which entail an excessive dissipation of power in quiescent state.
Another problem of these stages resides in keeping as low as possible the drop-out (difference between the supply voltage and the maximum peak-to-peak output voltage).
Furthermore said audio amplifiers must have good stability, and this may be troublesome if the output amplifier stage is constituted by a negatively fedback amplifier, not easily compensatable with integratable components.
Normally, in output stages of the indicated type, the bias or quiescent current is set by feeding the bases of the output power transistors with a constant current. Each output power transistor comprises a current mirror circuit formed by a transistor and by a diode, with the emitter area of the transistor forming the diode being dimensioned as to be 20 to 30 times smaller than the emitter area of the actual output transistor. A resistor is normally present in series to the diodes and increases the current gain of the current mirror as the output current increases.
A final stage of this type, with collector output of the output power transistor, is illustrated schematically in FIG. 1. In this figure, Q.sub.1 indicates an input transistor, to which the signal is applied, Q.sub.2 -Q.sub.4 are driving transistors, connected in pairs so as to define two current mirrors and form with the constant-current source I.sub.1 the driving stage. Q.sub.7 and Q.sub.9 indicate a higher current mirror, while Q.sub.6 and Q.sub.10 represent a lower current mirror, with the transistors Q.sub.6 and Q.sub.7 being connected with their emitters respectively to the negative supply voltage and to the positive supply voltage and, with their collectors, to one another and to the output B of the stage. In series to the transistor Q.sub.10 and Q.sub.9, forming the diodes of the output mirrors, resistors R.sub.9 and R.sub.10 are provided to increase the output gain in the case of high currents.
In this known circuit, considering the emitter area of the diode-connected transistors Q.sub.2 and Q.sub.3 equal to that of the actual driving transistors Q.sub.4 and Q.sub.5, and considering the emitter area of the diodes Q.sub.10 and Q.sub.9 equal to 1/20 of the area of the respective output transistors Q.sub.6 and Q.sub.7 (ignoring the base currents, the imprecisions of the current mirror circuits due to the Early voltage of the transistors and the voltage drops on the resistors R.sub.9 and R.sub.10) the output current of the stage I.sub.OUT is equal to approximately 20 times the current I.sub.1.
Said known output amplifier stage is affected by numerous disadvantages. In particular the current gain of the stage is not constant and passes from .beta.0.20 for low output currents to .beta..sup.2 for output currents for which the drop on the resistors R.sub.9 and R.sub.10 becomes no longer negligible, practically nullifying the action of the mirror transistors of the final stages. This fact causes a non-linearity in the response of the stage around the quiescent point.
A further cause of non-linearity of this stage is due to the low current which flows, in the quiescent state, in the driving transistors Q.sub.4 and Q.sub.5 and which must load, during the switching between Q.sub.6 and Q.sub.7, the capacitance of the base-emitter junction of said output transistors. This capacitance also has difficulties to discharge when the output transistor switches off because the junction between the base and the emitter thereof is inversely biased.
Said known stage furthermore allows reduced dynamics of the output final stage (with drop-out equal to twice the base-emitter drop of the output transistors plus twice the emitter-collector saturation voltage of the driving transistor). The circuit furthermore has a not high stability due to the loops formed by Q.sub.5, Q.sub.7 and by Q.sub.4, Q.sub.6, which have a high open-loop gain but unitary closed-loop gain.
Different solutions are conceivable for the solution of the above described problems, but such solutions allow to solve only some of these problems, without however solving them completely and simultaneously or have further circuital or operating disadvantages.